Project

Reverse Dependencies for rggen-markdown

The projects listed here declare rggen-markdown as a runtime or development dependency

0.14
A long-lived project that still receives updates
RgGen is a code generation tool for ASIC/IP/FPGA/RTL engineers. It will automatically generate source code related to configuration and status registers (CSR), e.g. SytemVerilog RTL, UVM RAL model, C header file, Wiki documents, from human readable register map specifications.
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